High frequency CMOS amplifier with improved linearity
Ali, M. Tanseer and Wu, Ruiheng and Mao, Luhong and Callaghan, Peter and Rapajic, Pedrag (2014) High frequency CMOS amplifier with improved linearity. IET Circuits, Devices and Systems, 8 (6). pp. 450-458. ISSN 1751-858X
Full text not available from this repository. (Request a copy)Abstract
In this paper, a novel amplifier linearisation technique based on the negative impedance compensation is presented. As demonstrated by using Volterra model, the proposed technique is suitable for linearising amplifiers with low open-loop gain, which is appropriate for RF/microwave applications. A single-chip CMOS amplifier has been designed using the proposed method, and the simulation results show that high gain accuracy (improved by 38%) and high linearity (IMD3 improved by 14 dB, OIP3 improved by 11 dB and adjacent channel power ratio (ACPR) improved by 44% for CDMA signal) can be achieved.
Item Type: | Article |
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Identification Number: | 10.1049/iet-cds.2013.0327 |
Dates: | Date Event 22 January 2014 Accepted |
Uncontrolled Keywords: | microwave applications, RF applications, single-chip amplifier , low open-loop gain, Volterra model, negative impedance compensation, amplifier linearisation technique, linearity improvement , high frequency CMOS amplifier |
Subjects: | CAH10 - engineering and technology > CAH10-01 - engineering > CAH10-01-01 - engineering (non-specific) CAH10 - engineering and technology > CAH10-01 - engineering > CAH10-01-08 - electrical and electronic engineering |
Divisions: | Faculty of Computing, Engineering and the Built Environment > College of Engineering |
Depositing User: | Euan Scott |
Date Deposited: | 28 Jan 2019 14:57 |
Last Modified: | 20 Jun 2024 11:51 |
URI: | https://www.open-access.bcu.ac.uk/id/eprint/6949 |
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